The invention relates generally to a word line voltage regulation circuit, and more particularly to, a word line voltage regulation circuit capable of preventing a wrong reading of a cell, in such a manner that as the supply voltage is increased up to 4.5V, the voltage applied to the gate is increased, but when the supply voltage is increased over 4.5V, the voltage applied to the gate is regulated to 4.5V, thus sufficiently securing read-out margin.
FIG. 1 is a characteristic graph of a cell current depending on the gate bias in the conventional flash memory cell. Conventionally, in order to read out the flash memory cell, a voltage of 0.8V is applied to the drain and the supply voltage Vcc that is the voltage used in the chip is applied to the gate. When the flash memory cell is usually programmed, the distribution of the threshold voltage in the cell is about 5Vxcx9c7V. Therefore, when the read-out operation is performed, the worst case is that the program threshold voltage of the cell is the lowest, that is, about 5V.
FIG. 2 is a characteristic graph of a cell current depending on the variations in the supply power in case that the conventional method is employed. This is a graph of a read-out margin when the threshold voltage of a basis cell is 2V, the supply voltage is applied to the gates of a main cell and the reference cell, and the data of the main cell is read using 1⅓ of the reference cell current. In other words, when a L2 line is based on, a L1 line is an erase cell current curve and a L3 line is a program cell current curve. As the program threshold voltage is 5V, when the supply voltage, that is, the voltage applied to the gate is below 5V, there is little changes in the program cell current. However, when the supply voltage is increased over 5V, the program cell current starts increasing rapidly. Thus, as the supply voltage is increased over 5V, the read-out margin on the program cell side is reduced. In other words, as the read-out margin is reduced, it sensitively responds the program cell current. Also, in case that the supply voltage is over 6.5V, it is wrongly read out that the cell is erased.
It is therefore an object of the present invention to provide a word line voltage regulation circuit in which a constant voltage can be applied to the gate even at a high supply voltage when a flash memory cell is read out so that a sufficient read-out margin can be secured, thus preventing a wrong reading of the cell to increase the operational reliability of a device.
In order to accomplish the above object, a word line voltage regulation circuit according to the present invention is characterized in that it comprises a first comparator for comparing a first reference voltage and the potential of an output node; a first switching means for supplying the supply voltage to the output node depending on the output signal of the first comparator; a second comparator for comparing a second reference voltage and the potential of the output node; a second switching means for regulating the potential of the output node depending on the output signal of the second comparator; a third switching means for transmitting the potential of the output node to a decoder circuit depending on a first control signal; and a fourth switching means for supplying the supply voltage to the decoder circuit depending on a second control signal.